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Physics 116B, Winter, 2005

Lecture: MWF 1:10-2:00 PM, Rm. 158 Roessler.

Lab: Wed. 3:10-6 PM Rm. 152 Roessler. (Note: lab on Wednesday only)

Instructor: Prof. David E. Pellett, 337 Physics, (530) 752-1783,

Office hours: 11:30-12:30 W in 152 Roessler, or by appointment.

E-mail: pellett@physics.ucdavis.edu.

TA: Andrew Baldwin, 113 Physics.

Office hours: TBA

E-mail: baldwin@physics.ucdavis.edu.

Prospectus | Assignments | Announcements | Links

Last updated Sat, Feb 4, 2006

Prospectus

Physics 116B is an introduction to pulse response of circuits, digital electronics and computer fundamentals. It is valuable for students who want to do experimental work, who want to understand the basis of our increasingly electronic environment or who want to develop new instrumentation or technology.

The prerequisite is Physics 116A (or consent of instructor), which covers DC and steady-state AC circuit theory, semiconductor device fundamentals and analog circuits. Here is the web page for Physics 116A from last quarter.

Physics 116C information: Here is the preliminary class outline for Physics 116C from last year.

Physics 116B Winter 2004 Outline
Week Monday Topics/Notes Lab
1 (Jan 3) First day of class is Wed., Jan. 5
Intro.; Comparator, Schmitt trigger
(No lab this week)
2 Jan 10 Pulse circuit analysis; Relaxation osc.
Laplace transform
(Notes on BJT Schmitt trigger)
10: Schmitt Trigger
3 Jan 17

Martin Luther King holiday on Monday
Logic gates and Boolean algebra (notes)
(Monday classes meet on Fri., Jan.21)

11: Relaxation Oscillator
Also: TLC555 timer specs
Alternate thermistor curve (no white dot)
4 Jan 24 Combinational circuit design
Logic circuits: TTL, CMOS, ECL
Notes on logic circuits (Rev. 2/18/05)
RTL pulse response demo
12: Combinational Logic
5 Jan 31 Flip-flops and counters
Exam 1 on Friday, Feb. 4.
13: Inside Digital IC's
(don't worry that it's called No.12 again)
6 Feb 7 Sequential circuits (notes on design)
14: Sequential Logic
datasheet for 74LS74A
7 Feb 14 A to D, D to A conversion. 15: A to D and D to A Conversion
datasheets for 74LS191, LM311,
MC1408 DAC (use N pkg)
8 Feb 21 Presidents' Day holiday on Monday
M68000 Microcomputer, Assembly language, I/O
(see links below for technical manual excerpts)
16: Tristate Busses and Memory
9 Feb 28 M68000 Lec. Notes I
Exam 2 on Wednesday, March 2.
M68000 Lec. Notes II

17: M68000 Assembly Language
Also: Notes on M68000 Programming to accompany Lab 17

10 Mar 7 M68000 Lec. Notes III
18: M68000 I/O via SCSI Port Hack (called Lab 17)
11 Mar 14 Last class Monday, March 14.
Lec. notes: ADC, Sampled signals and aliasing
Discuss MT2 solutions and final exam
Final Exam on Fri., March 18,
10:30 AM - 12:30 PM

Text:

References:

Class fact Sheet & Schedule (.pdf format).

The .pdf files require Adobe Acrobat 5.0 reader (or later).

 

Assignments

Assignment 1: Read Bobrow, Ch. 10: Sec. 10.5; Ch. 3 (response of circuits to pulses: particularly secs 3.3 and 3.4); Ch. 5: 5.5-5.7 (Laplace transform circuit analysis). Ch. 7: 7.3 (BJT cutoff and saturation; emitter-coupled Schmitt trigger; switching time–here are Notes on SPICE analysis of a BJT Schmitt trigger.)
Problems due Wednesday, 1/12/04 (at beginning of lab): Ch. 10: 10.70, 10.71, 10.78(a), 3.29 (assume the voltages and currents have reached their steady-state values before the switch is opened), 3.42 (assume the voltage across the capacitor and the current through it are zero just before the pulse arrives; you can use Thevenin's theorem here for the voltage source and two resistors).
For Lab: A new version of the Schmitt Trigger lab writeup has been posted with the following problem to work in your lab notebook before you come to lab. Prove the equation for Vth in terms of Vbb and Vout. Hint: use the Thevenin equiv. of the voltage divider formed by Vbb , R1 and R2.
Solutions to Assignment 1 are here.

Assignment 2: Start reading material (needed for Lab 12) on binary numbers, Boolean algebra and combinational logic circuits, namely Ch. 11 and Sec's 1 and 2 of Ch. 12 plus these notes on logic gates and Boolean algebra. Problems due Fri. 1/21/04: pulse problems (4) here, plus Ch. 7: 7.30(b), 7.34.
Solutions to Assignment 2 are here: pulse, Ch. 7.

Assignment 3: Continue reading the material from the last assignment for lectures and lab this week
Problems due Fri. 1/28/04: Ch. 5: 5.67, 5.69, 5.110(a,b). Use Laplace transform techniques to solve these problems from Ch. 5. Assume currents and voltages in circuits are 0 for t < 0. Ch. 10: 10.75. Ch. 11: 11.19, 11.23, 11.27
Solutions to Assignment 3 are here.

Assignment 4: Read 7.4, 7.5.
Problems due Wed. 2/2/05: Ch. 11: 11.33, 11.37, 11.46, 11.51(a), 11.53(c), 11.57(b), Implement 11.53(c) and 11.57(b) efficiently with two stage logic using only (multiple-input) NAND gates and inverters; Ch. 12: 12.3, 12.17, 12.22.
Solutions to Assignment 4 are here.

An exam is coming Friday, Feb. 4. It will cover all the material assigned up to now through Sec. 12.2 in the text (including simple Schmitt triggers and logic circuits made with BJT's, resistors and diodes plus additional material discussed on 555 timer internals). Problems like the ones assigned for Wednesday 2/2 are also "fair game." Solutions will be posted Wednesday. You may bring one 8.5 in x 11 in sheet of paper with information. The table of Laplace transforms handed out in class will be provided. A previous exam with solutions is available here.

Assignment 5: Monday's lecture will give an overview of logic circuits using the notes from Week 4 of the course outline (above) including the RTL Pulse Demo notes. The description of logic circuits is covered in the text in Sec's 7.4-7.7 (BJT circuits) and Sec. 8.4 (CMOS). The BJT material is presented in much more detail than we need. I will emphasize the highlights of TTL (and Schottky TTL) and CMOS with a brief mention of ECL. The main things to concentrate on are how the transistors are used as switches, the circuit mechanisms, the logic voltage levels and the circuit "fanout."
On Wednesday, I should conclude this and give an introduction to Wednesday's lab on sequential logic and counters.Read Sections 12.3, 13.1 and 13.2 and the notes on Sequential Circuit Design from Week 6 of the course outline (above).
Problems due Wed. 2/9/05: Ch. 12: 12.23, 12.27 plus the problems on this logic circuit handout.
Solutions to Assignment 5: Bobrow problems and logic circuit problems. I have worked out the Bobrow problems this time and include a simulation of the flip-flop of 12.27 for the case R=S=1 using the chipmunk "log" tools (see link below for software if you want to try it yourself).

Assignment 6:

Assignment 7:

Assignment 8:

Assignment 9:

Final Exam: The final exam will be on Fri., March 18, 10:30 AM - 12:30 PM. You may use three 8.5 in by 11 in sheets plus the excerpts from the M68000 Programmer's Manual and MAS Manual (bring them and turn them in at the end of the exam, please). The exam will cover the entire course with some emphasis on recent material.
Sample (old) final here.
Review topics, including labs:
(see also the course outline table above)

Announcements

1/5/05: Welcome back from the holidays!

1/7/05: The homework assignments will be due at the beginning of lab each week. Also for the lab, a new version of the Schmitt Trigger lab writeup has been posted with a problem to work in your lab notebook before you come to lab: prove the result given for Vth in terms of Vbb and Vout.

1/14/05: Assignment 1 solutions have been posted above. Note change: Assignment 2 problems will be due at the beginning of class Friday, 1/21 (instead of Wednesday).

1/18/05: I will hold office hours on Friday, 1/21 instead of Wednesday this week (to match the problem due date).

1/25/05: I will hold office hours on Friday, 1/28 instead of Wednesday this week (to match the problem due date). Solutions to Assignment 2 have been posted above.

2/3/05: Due to the impending exam, I will hold extra office hours this week on Friday, 2/4 between 11:30-12:30 in the lab.

2/16/05: The chipmunk "log" programs are available on the Physics computers in Room 106 Physics now. To run diglog, go to your own directory (so you can save files) and enter the following in an xterm window:
/usr/local/chipmunk/bin/diglog &
Clicking on 'help' in the layout window will bring up a text file window with information on using the program.

2/18/05: A revision has been made to p. 5 of the notes on logic circuits from Week 4 (above). As we discovered in class, there was an inverter left out of the OE' input circuit, resulting in an error in the truth table and confusion in the discussion on that page. This has been corrected.

2/23/05: Here is a link to the 340-page Texas Instruments Logic Selection Guide (a very small part of which) I showed in class today (comparison of recent logic families). See in particular pages 17, 23 and 26.

3/7/04: The first problem due next Monday was handed out in class and is also posted above under Assignment 9. I changed the number of characters to check to 40 (from 100) to make defining the characters less tedious.

3/11/04:

3/14/04:

Links to topics relevant to class/lab

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