Physics 116B, Winter, 2007

Lecture: MWF 1:10-2:00 PM, Rm. 158 Roessler.

Lab: Monday (Sec. 2) or Wednesday (Sec. 1) 3:10-6 PM Rm. 152 Roessler.

Instructor: Prof. David E. Pellett, 337 Physics, (530) 752-1783,

Office hours: Wednesday 2:10-3PM in 152 Roessler and Thursday 4:10-5PM in 152 Roessler, or by appointment.

E-mail: pellett (at) physics (dot) ucdavis (dot) edu.

TA and Reader: Solomon Obolu, 436 Physics.

Office hours: TBA

E-mail: obolu (at) physics (dot) ucdavis (dot) edu

Physics 116B is an introduction to pulse response of circuits, digital electronics and computer fundamentals. It is valuable for students who want to do experimental work, who want to understand the basis of our increasingly electronic environment or who want to develop new instrumentation or technology.

The prerequisite is Physics 116A (or consent of instructor), which covers DC and steady-state AC circuit theory, semiconductor device fundamentals and analog circuits. Here is the web page for Physics 116A from last quarter.

Physics 116C information: Here is the preliminary class outline for Physics 116C from last year.

Texts:

Bobrow, Fundamentals of Electrical Engineering, 2nd ed.
Horowitz and Hill, The Art of Electronics, 2nd ed.

References:

Ford and Topp, Macintosh Assembly System (lab copies to loan)
Motorola, M68000 Family Microprocessor User’s Manual (see links below)
Motorola, M68000 Family Programmer's Reference Manual (see links below)
plus library references and supplementary handouts

Class fact Sheet & Schedule (v. 1.0) (.pdf format).

The .pdf files require Adobe Acrobat 5.0 reader (or later).

• PDF reader download site (Adobe Systems).

RSS Feed: To get the Physics 116 news feed, which I use for listing announcements as they are posted, you need to enter the following URL: feed://www.physics.ucdavis.edu/Classes/Physics116/rss/Physics116.xml. 

Assignment 1: Read Bobrow, Ch. 10: Sec. 10.5; Ch. 3 (response of circuits to pulses: particularly secs 3.3 and 3.4); Ch. 5: 5.5-5.7 (Laplace transform circuit analysis). Ch. 7: 7.3 (BJT cutoff and saturation; emitter-coupled Schmitt trigger; switching time – here are Notes on SPICE analysis of a BJT Schmitt trigger.)

• Problems due Friday, 1/12/07: Ch. 10: 10.68, 10.73, 10.78(a), 3.29 (assume the voltages and currents have reached their steady-state values before the switch is opened), 3.42 (assume the voltage across the capacitor and the current through it are zero just before the pulse arrives; you can use Thevenin's theorem here for the voltage source and two resistors).
  For Lab, the Schmitt Trigger lab writeup has the following problem to work in your lab notebook before you come to lab: prove the equation for V_th in terms of V_bb and V_out. Hint: use the Thevenin equiv. of the voltage divider formed by V_bb , R₁ and R₂.
• Problem Set 1 solutions

Assignment 2: Reading – start reading material (needed for Lab 12) on binary numbers, Boolean algebra and combinational logic circuits, namely Ch. 11 and Sec's 1 and 2 of Ch. 12 plus these notes on logic gates and Boolean algebra.

• Problems due Fri. 1/19/07 Monday, Jan. 22 (note change): Use Laplace transform techniques to solve the following problems from Ch. 5: 5.61(b), 5.66, 5.72. Also
  • Special Problem 1: An RC high pass filter has v_in = a t u(t) (a ramp function with slope a starting at t=0). Find v_out(t). Make a sketch of your result.
  • Special problem 2 here on compensated oscilloscope probe and pulse rise time (I went over this briefly in class).
• In all of these problems, assume currents and voltages are 0 for t < 0.
• Problem Set 2 solutions

Assignment 3: Continue reading the material from the last assignment for lectures and lab this week
Problems due Monday 1/29/06:

• Ch. 11: 11.19, 11.22, 11.24, 11.27, 11.37, 11.44, 11.50(a), 11.54.
• Problem Set 3 solutions
• Quiz 1 Solutions

Assignment 4:

• Special group problem due Friday 2/2/07. This was discussed in class on Monday, 1/29. Closed book and notes but you can use the Laplace handout provided here. I will be available in office hours Wednesday and Thursday, of course, to answer questions.
• Assignment 4: Read 7.4-7.6, 8.4 to get an overview of logic circuit families such as TTL, Schottky TTL, ECL and CMOS. We will discuss simplified models in class (notes here or in Week 4 of the Class Outline, above); 12.3 (flip-flops and sequential circuit introduction – the first part of this section is needed for Lab 13.).
• Problems due Mon. 2/5/07: Ch. 11: 11.51(d) (use Karnaugh map), 11.53(a), 11.57(a,b) – also, implement 11.57(a, b) efficiently with two stage logic using only (multiple-input) NAND gates and inverters; Ch. 12: 12.3, 12.7, 12.17, 12.19, 12.30(see Table 12.17 for the truth table of an SR "latch").
• Assignment 4 solutions
• Quiz 1 clinic solution (special group problem)

Assignment 5:

• Read Bobrow, Sections 13.1 - 13.3 and the notes on Sequential Circuit Design from Week 6 of the course outline (above).
• Further reading: Bobrow, 13.4 (the section on DACs and ADCs is needed for the ADC lab next week).
• The text by Horowitz and Hill (H&H) has more detailed information and valuable lore about the material we are covering and includes an introduction to some needed additional topics such as programmable logic devices (PLDs). A guide to relevant material is as follows:
  • H&H Sec. 8.15-8.29, 8.33-8.35: logic and sequential circuit design including basic PLD applications; logic circuit pathologies.
  • H&H Ch. 9 through Sec. 9.14: logic families, interconnections, do's and don'ts.
  • H&H Sec. 9.15-9.25: ADC's and DAC's. Fig. 9.47 shows a basic DAC similar to the one used in Exp't 15.
  • H&H will be the primary text when we talk about microcomputers.
• Problems due Monday, 2/12/07: 12.35, 12.36 (also draw state diagram), 12.44; 13.3, 13.11 plus these two problems on sequential circuits. Note for 13.3: with D flip-flops, you can make the Karnaugh maps for each D input directly from the transition table or state diagram. Here is a hint (example) for Prob.13.3.
• Assignment 5 solutions

Assignment 6:

• Problem due Wednesday, Feb. 14 here. (This is the same problem handed out in class Monday, but includes the state diagram for the circuit which you found in the previous homework.)
• Further notes:
  • (a) The maximum clock frequency for a synchronous sequential circuit was discussed in class. In short, the minimum clock period is determined by the sum of
    • the flip-flop delay (assuming all ff's are the same)
    • plus the sum of the gate delays in the longest path from a flip-flop output to a flip-flop input (with external inputs to the circuit itself held constant)
    • plus the flip-flop setup time
    • (use worst case values).
  • (b) Setup and Hold times: the flip-flop inputs of a synchronous sequential circuit must be held constant during the flip-flop set-up and hold times. Failure to do this can lead to an unexpected transition or to a metastable state (see Horowitz and Hill, pp. 510-511, 552.)
    • An asynchronous external input signal is one which can occur at a random time not synchronized with the system clock. It could change state during the times the inputs are supposed to be steady. Such a signal can be synchronized with the system clock by putting it through one or two stages of D flip-flops connected to the clock before connecting it to the circuit. This way the sequence of the main counter is protected from malfunction due to the asynchronous nature of the external signal.
  • (c) Glitches: a glitch is an undesired short signal arising in an electronic circuit. A glitch can occur if logic (such as an AND) can produce a valid output momentarily as inputs change from one state to another even if the state detected is not the initial or final state. For example, consider F=BA, the AND of A and B corresponding to a two bit binary number from a binary counter circuit (A being the less significant bit). F would be 1 in the state B=1, A=1 ("3") and could be used to detect ("decode") this state. BA could also be 1 for a short time as the counter made the transition from "1" (01) to "2" (10) if A stayed high for a brief time after B changed to 1. If you were trying to detect state "3" to reset the counter (to count modulo 3, for example), it could be reset prematurely by the glitch. Since the glitch is short, it might cause the reset only intermittently. Also, since the pulse is short, it may be hard to see on an oscilloscope. Not all transitions generate glitches. For example, in going from "0" to "1," only one input changes, so there would be no glitch on F for that transition. See figure:

  writeup

1/3/07: Welcome back from the holidays!

• The due date for the first problem set was incorrect. I have changed it to Friday, Jan. 12. Additional problems may be added Friday, Jan 5.
• I have added lecture notes from the first lecture (in Week 1 of the outline, above).

1/5/07: I have added some notes on the procedure to the Lab 10 writeup and have provided the op-amp pinout on the Schmitt trigger diagram. Please download the fresh copy.

1/12/07: Problem assignment 2 has been added. My office hours (Wednesday 2:10-3PM in 152 Roessler and Thursday 4:10-5PM in 152 Roessler, or by appointment) have also been added near the top of the page.

1/17/07:

• Homework Assignment 2 will be due Monday, Jan. 22 rather than Friday, Jan. 19.
• The solution to Problem Set 1 has been posted under Assignment 1 above.
• Lecture notes from today about the TLC555 Timer lab have been posted in the class outline for Week 3.

1/23/07: Solutions for Problem Set 2 have been posted under Assignment 2, above.

1/25/07:

• A problem set in Ch. 11, due Monday, Jan. 29 was announced in class on Wednesday. It is given above under Assignment 3.
• As stated in class, the 25 minute quiz at the beginning of class Friday will emphasize the material we have covered so far in Ch. 3, Ch. 5 and Ch. 10 plus the first two labs. We have also discussed material in Ch. 7: (a) BJTs used as switches in cutoff and saturation and (b) the emitter-coupled Schmitt trigger. A BJT is used as a switch in Lab 11.
  • Bring paper and a calculator. The Laplace transform table handout will be provided with the quiz (augmented version of Table 5.1 on p. 314 of Bobrow).

1/30/07: Assignment 4 has been posted. This includes a group problem set based on the quiz, due Friday, and a regular homework set due next Monday, 2/5/07.

2/1/07: Solutions have been posted for Assignment 3 problems, above.

2/2/07:

• The solutions for Quiz 1 have been posted under Assignment 3, above.
• Exam 1 has been moved one week later. It will be given on Friday, Feb. 16.

2/6/07: Assignment 5 has been posted above. Some more problems may be added Thursday.

2/8/07:

• Two additional problems have been added to complete Assignment 5.
• The solutions for Assignment 4 have been posted.

2/13/07: A short problem was assigned Monday (and posted in somewhat expanded form above under Assignment 6). It will be due Wednesday, Feb. 14. Notes on glitches and maximum clock speed were also entered under Assignment 6.

2/13/07: The midterm exam is coming up Friday, 2/17/07. It will cover the assigned material in Ch. 3, 5, 7, 8, 10,11, 12 and 13 through Sec. 13.2 of Bobrow, Labs 10, 11, 12, 13 and 14 (plus relevant notes and related topics discussed in class, including sequential circuit design). It will not include details of TTL and CMOS circuits in the notes posted in Week 4 of the class outline. (We'll start that Wednesday).

I have added a list of review topics keyed to the exams and quizzes. See the "Review Topic Timeline" below.

You may bring one 8 1/2" by 11" page with information of your choice.
Otherwise, it will be closed book and notes. The augmented table of Laplace transforms will be provided (as in the Quiz 1 solution). I will also include the "input equations" for the JK flip-flop from the notes on sequential circuit design. Be sure to bring a calculator.

Here is a copy of Exam 1 from last year with solutions but Beware of differences:

• sequential circuit problems like the last homework will be on the exam this year (perhaps including maximum clock frequency)
• Specific TTL and CMOS logic circuit internals will not be on this year's exam although use of BJTs or MOSFETs as switches could be,

2/13/07: The solutions for Assignment 5 have been posted above.

2/14/07: The solutions for the "Quiz 1 clinic" have been posted under assignment 4. Also, the solutions for the two short problems on glitches and maximum clock frequency have been posted under Assignment 6.

2/21/07: Assignment 7 has been posted with problems due Monday, Feb. 26.

2/22/07: The midterm exam with solutions has been posted under Assignment 6, above.

2/27/06:

• Assignment 7 homework will be due Wednesday, Feb. 28 (instead of Monday). More information for Prob. 9.1 in Horowitz & Hill has been added. See Assignment 7, above.
• Office hours have been changed this week to allow me to attend a meeting off-campus Wednesday afternoon and Thursday. I was available from 2-3 on Monday and will be available from 4:10-5:00 PM Tuesday, Feb. 27 in the 116 lab.
• The upcoming quiz on Friday, March 2 will cover TTL and CMOS internal circuitry (similar to the assigned problems) and to a lesser extent ECL circuits. It can also cover MSI counters, tri-state outputs, glitches, maximum clock frequency, data busses, etc. based on recent homework and labs. Memory chip questions will be left for the final exam.
  • You may bring one 8.5" x 11" sheet of notes.

3/1/07:

• Quiz 2 postponed until Monday, March 5 due to conflict with other exams.
• Solutions for Assignment 7 problems have been posted under Assignment 7 above.

3/6/07: Reading assignments for this week and next on microprocessors and related topics in Bobrow and Horowitz and Hill have been added above. A few problems will be added tomororrow, due the following Wednesday.

3/7/07:

• Problems have been added under Assignment 8 above. They are due Wednesday, March 14.
• Quiz 2 and its solutions have been posted at the end of Assignment 7.

Final Exam Information: The final exam will be on Sat., March 17, 8:00 AM - 10:00 AM. You may use up to three 8.5 in by 11 in sheets plus the excerpts from the M68000 Programmer's Manual and MAS Manual (bring them and turn them in at the end of the exam, please). The Laplace transform table will be provided. The exam will cover the entire course with emphasis on recent material.
Sample final (from last year) here.

Quiz 2: If I had checked my mailbox on my way to class, I would have found the graded papers. Most students appeared to understand most of the material: the mean was 43 out of 50 with a standard deviation of 4.2. I handed back papers for those of you in the Monday lab and will hand back the rest in class Wednesday - D.P.

Solutions for Assignment 8 problems have been posted under Assignment 8, above
Office hours before final:
Thursday, March 15 from 4:10-5:00 PM in the 116 lab
Friday, March 16 from 4:10-6:00 PM in the 116 lab.
Final exam topics have been updated below. Material on sampled waveforms discussed on the last day will not be on the exam although ADC-related topics may be on the exam (see Assignment 5 and Lab 15).

• Texas Instruments web site with IC specifications and data sheets:
  • Main site
  • Logic "product tree"
  • Logic Selection Guide (pdf)
• Specifications for Texas Instruments TLC555 timer circuit (Lab 11)
• Some tools for logic simulation (and more):
  • a small logic simulator written in Java (some care is needed to get good results since FF's don't seem to include built-in delays, although you can add them in custom modules); here is an example of making a D flip-flop module with delays
  • Chipmunk tools (use a package called "log" -- compilation required but not too bad; works with various systems)
    • The diglog program is now available on the Physics Linux computers in Rm. 106. Just type diglog to start it.
  • Here is a German page (at the Kaiserslautern Technical University) with the Chipmunk "diglog" program ported to Windows (logwin32.exe) - the link is in the first table as an exe file under "Windows Executable."
    • The instructions say, "There shouldn't be major problems under Windows. Simply extract the file logwin32.exe in a directory of your choice. Diglog is started by double-clicking on log.exe. (The installation file is a self-unpacking zip archive. In case of problems, one can also unpack it "by hand" with WinZip, etc.)"
  • another link on chipmunk usage (Prof. Matloff at UC Davis)
    • chipmunk can be used to design your own VLSI chips
• Specifications for Harris HI5812 ADC
• Texas Instruments technical note: Understanding Data Converters
• Motorola M68000 Family Programmer's Reference Manual: Excerpts for 116B (224KB)
• Motorola M68000 Family Programmer's Reference Manual: Complete text (1.7 MB)
• Motorola M68000 8-/ 16-/ 32- Bit Microprocessors User's Manual: Complete text (1 MB)
• Motorola M68060-series Product Description
• Here is a link to various M68000 resources including assembler/emulator systems which work on PC's, etc.
  • I have tried the Easy68K system for Windows briefly and it worked for me.
• Embedded systems for scientific applications: example at the European Synchrotron Radiation Facility (article from Linux Journal)
• Link to an early article in BYTE Magazine describing the M68000-based Mac Plus
• Link to a review of the beta release of LabVIEW (graphical data acquisition and analysis system)
• Origins of GUI-based computing: the Alto computer from Xerox-PARC. (note the machine was actually built from SSI and MSI chips)
• Operating systems: the origins of UNIX
• BYTE Magazine's historical survey of small computers.
• Silicon optical switching technology.
• Byte Magazine's historical survey of influential microchips (M68000 credited with popularizing GUI computers)
• Notes on poles of the transfer function, H(s), and Laplace transforms with figures.
• The physics of computation group home page at Caltech.
• The connection of neuron cells to an electronic interface.
• Information on SPICE and personal computer versions:
  • Spice3 is available on the Physics Linux computers in Rm. 106.
  • SPICE documentation in .pdf form: copyright notice, table of contents, document body
  • General SPICE distribution from Berkeley (various systems: UNIX, MS-DOS, ...)
  • SPICE Linux rpm for i386 (This is 3f4. Rpmfind or Google can also help you find Spice 3f5 for Linux)
  • PSPICE 9.1 Student Version (Windows) file still seems to be available here.
  • WinSPICE: Spice3 for Windows (including XP) from S.C. Wong of the Hong Kong Polytechnic University.
  • MacSpice 3f5 at University of Exeter School of Physics. Now for Mac OS X!
• The 50th anniversary of the transistor (check out the "inventors" link, too).
• Some physicists who made inventions or advances in electronics (note that these advanced physics in most cases):
  • John Bardeen with Nobel prizes for the transistor and superconductivity theory;
  • Robert Noyce, inventor of the integrated circuit and co-founder of Intel;
  • Bruno Rossi, cosmic ray pioneer and inventor of the Rossi coincidence circuit;
  • Luis Alvarez, member of inventor hall of fame and Nobel physics laureate.
• Article from IEEE Spectrum on the Crusoe VLIW processor from Transmeta.

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