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Physics 116B, Winter, 2011

Lecture: MWF 2:10-3:00 PM, Rm.185 Physics (in Physics atrium area, west side).

Lab: Monday (Sec. 2) or Wednesday (Sec. 1) 3:10-6 PM Rm. 152 Roessler.

Instructor: Prof. David E. Pellett, 337 Physics, (530) 752-1783,

Office hours: typically either Tuesday 3:10-4 or Thursday 4:10-5 in 152 Roessler as announced in SmartSite or by appointment.

E-mail: pellett (at) physics (dot) ucdavis (dot) edu.

TA: Mark Triplett

Office hours: TBA

E-mail: mttriplett (at) ucdavis (dot) edu

Reader: Eric Warren Sangaline

Office hours: Thursdays 4-5 PM in Room 394 Physics

E-mail: ewsangaline (at) ucdavis (dot) edu

Prospectus | Assignments | Announcements | Topic Timeline | Links

Last updated Thu, Mar 24, 2011

Prospectus

Physics 116B is an introduction to pulse response of circuits, digital electronics and computer fundamentals. It is valuable for students who want to do experimental work, who want to understand the basis of our increasingly electronic environment or who want to develop new instrumentation or technology.

The prerequisite is Physics 116A (or consent of instructor), which covers DC and steady-state AC circuit theory, semiconductor device fundamentals and analog circuits.
Here is the web page for Physics 116A from last quarter.

Physics 116B Winter 2011 Preliminary Outline (lab sequence may be modified)
Some notes will also be posted in the Lecture Notes folder of SmartSite Resources
Week Monday Topics/Notes Lab
1 Jan 3 Class and lab start Mon., Jan. 3
First day lecture notes here
Intro.; comparator, Schmitt trigger
Pulse circuit analysis;
relaxation osc.
(Notes on BJT Schmitt trigger)
10: Schmitt Trigger
LF411 Op Amp Specifications
(same pinout as 741)
2 Jan 10 555 Timer
TLC555 Timer Notes (lab intro)
Laplace transform (table here)
11: Relaxation Oscillator and One Shot
Also: TLC555 timer specs
Alternate thermistor curve (no white dot)
3 Jan 17

M. L. King holiday on Monday
Logic gates and Boolean algebra (notes)

(No labs this week due to Monday holiday)
4 Jan 24 Combinational circuit design
Logic circuits: TTL, CMOS, ECL
Notes on logic circuits (Rev. 2/5/06)
RTL pulse response demo
25 Min. Quiz 1 Fri., Jan. 28
12: Combinational Logic
5 Jan. 31 Flip-flops and counters 13: Inside Digital ICs
6 Feb 7 Logic Circuits II (Rev, 2/28/11)
Sequential circuits (notes on design)
Also refer to this note on timing and glitches
14: Sequential Logic
Datasheet for 74LS74A
7 Feb 14 A to D, D to A conversion.
Exam Friday, Feb. 18
15: A to D and D to A Conversion
datasheets for 74LS191, LM311,
DAC08 DAC (use P pkg)
8 Feb 21 Presidents' Day holiday on Monday
RAM, Data busses
Computer data representations
Microcomputer architecture
W:16: Data Bus, Tri-State Outputs and Memory (new version for 2011)
Datasheets: 74LS241 and 8 kByte SRAM (Cypress CY7C185)
9 Feb 28 Arduino prototyping platform
Atmel AVR Microcontroller

M: See previous week
W:
Lab 17: Arduino introductory projects.
Review Arduino references in Assignment 7 before lab to the extent possible.

10 Mar 7 25 Min. Quiz 2 Mon., Mar. 7
AVR Assembly Language and I/O
Introduction to sampled signals (notes on SmartSite)
M: See previous week
W: Lab 18, Atmel AVR assembly language and AT90S8515 microcontroller
Review references in Assignment 8 before lab.
11 Mar 14 Last class Mon., March 14 M: See previous week
Final Exam on Fri., March 18,
8:00 AM - 10:00 AM

Texts:

References:

Grading: 9% Quiz 1, 18% MT, 9% Quiz 2, 25% Lab (required, on time), 10% HW, 29% Final.

Assignments

Assignment, Week 1: Read Bobrow, Ch. 10: Sec. 10.5; Ch. 3 (RC charging and discharging, response of circuits to pulses, particularly secs. 3.3 and 3.4, integrator, differentiator); Ch. 7: 7.3 (BJT cutoff and saturation; emitter-coupled Schmitt trigger; switching time – here are Notes on SPICE analysis of a BJT Schmitt trigger), 544-546 (MOSFET as switch).

Assignment, Week 2: Read Lab 11 writeup before coming to class Monday. Read Bobrow, Ch. 5: 5.5-5.7 (Laplace transform circuit analysis). Notice that the Laplace transformation solutions are complete solutions to the circuit differential equations, including the effect of the initial conditions (zero or nonzero). Figures 5.38(c) and 5.39(c) show how to include nonzero initial conditions for inductors and capacitors, respectively.

Assignment, Week 3: Read material in Bobrow on binary numbers, Boolean algebra and combinational logic circuits, namely Ch. 11 and Sec's 1 and 2 of Ch. 12 plus these notes on logic gates and Boolean algebra.

Assignment 4:

Assignment 5:

Assignment 6:

Assignment 7:

Assignment 8:

Announcements

Please refer to the SmartSite announcement area

2011: Preliminary Topic Timeline
For Quizzes, Midterm exam and Final, including Labs
(Under development. See also the course outline table above)

Quiz 1 to cover material up to this point.

Midterm exam to cover material up to this point.

  • MSI counters (binary, BCD, up/down, preset input, count enable input, carry output, connecting together to get more bits, altered sequences, etc.)
  • VLSI memory chips (static RAM, dynamic RAM, EEPROM and flash memory)
  • Synchronous state machines in general, PLA, FPGA overall concepts (H&H, other reading assignments; Bobrow refers to "FPLA")
  • Analog meets digital II: DACs, ADCs
  • Data/Address/Control bus and tristate outputs; memory R/W access (as in Lab 16)

Quiz 2 to cover material up to this point, emphasizing recent topics. (The quiz may have questions on logic families and circuitry, interconnection dos and don'ts and other material covered in the H&H reading assignments and/or mentioned in class.)

  • Basic microcomputer concepts:
    • ASCII code, hexadecimal numbers, twos complement integers
    • Chip interconnection and I/O signals (general overview)
    • Computer registers and instructions
    • Assembly language
    • I/O and software code
    • Interrupts (see H&H pp. 756-758, 778-779 for example)
  • Sampled waveforms, Nyquist critical frequency, aliasing, dynamic range
    • sample and hold circuit;
    • requirement for anti-aliasing low pass filter in general.
  • Atmel AVR microcontroller and Arduino
    • General concepts: "all in one" device with RISC processor, EEPROM, SRAM and Flash RAM, ADC, timer/counters, analog and digital I/O pins
    • AVR architecture and assembly language
      • Atmel development tools: assembler, debugger
    • Arduino board with USB interface: experience with development tools and Arduino language based on C
  • This slide about the final exam was presented in class Monday, 4/14.

Final Exam will be comprehensive but will have some emphasis on recent material. Note: the sampling theorem and aliasing (to be covered in 116C), interrupts and the Madison Arduino application will not be on the final exam.


Links to topics relevant to class/lab

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